1. Field of the Invention
This invention relates generally to a power-on reset circuit used in electronic devices and particularly to a power-on reset circuit required upon the power-up of an integrated circuit to set the integrated circuit to a known and predefined state.
2. Related Art
Integrated circuit (IC) technology continues to advance, with ICs able to perform a greater number of increasingly complex functions. Consequently, the power consumption of ICs is increasing with the increasing complexity of the IC. Furthermore, there is a demand for longer battery life in mobile electronic systems, therefore, power consumption is a major concern in designing mobile electronic systems. Decreasing power consumption decreases cooling costs, power supply costs, packaging costs, and improves reliability. At times when an IC is not operating, the battery can be disconnected from the IC to disable operation of the chip, reducing power consumption.
A concern in powering-up an IC after the battery has been disconnected is the state into which each of the registers in the IC enters upon power-up. If a single latch or flip-flop powers-up into an undesirable state, a catastrophic failure of the IC may occur. Therefore, at power-on of the IC, each register must be cleared to a predefined state by a power-on reset (POR) circuit. Then, after a predetermined interval of time, the IC is able to enter values into the registers. In this way, the first state of all of the registers at power-on of the IC is always the cleared state. Therefore, the IC will always power-up properly. The POR circuit allows resetting to predetermined register values, allowing the IC to be used immediately without performing any programming operations.
In the past, a common POR circuit compared two voltages with a simple comparator as shown in FIG. 1. A comparator compares two input voltages (V+ and V- ) and outputs a high or low voltage signal depending on whether V+ is higher or lower in voltage value than V-. As used herein, a high output voltage signal refers to the battery voltage while a low output voltage signal refers to ground.
It is well known in the art that a comparator comprises a differential pair of transistors having inputs at the positive and negative inputs of the comparator. As shown in FIG. 1, the positive input of the comparator is connected to a resistor/capacitor divider and the negative input to the comparator is connected to a completely resistive voltage divider.
Timing diagrams of the comparator POR circuit are included in FIG. 1. During power-up of the voltage supply, the completely resistive voltage divider follows the rise of the supply voltage, but at a lower voltage. Thus, V- will be at a lower voltage than the supply voltage as it rises with the supply voltage during power-up. The resistor/capacitor divider voltage will rise as the capacitor begins to charge to the final supply voltage value as shown in FIG. 1. The capacitor functions as an open circuit under DC conditions, therefore, current will not flow through the capacitor, and the capacitor will eventually maintain the final supply voltage value after it is fully charged.
The resistor/capacitor divider voltage, V+, will charge slower than the completely resistive divider voltage, V-. The resistor/capacitor voltage, V+, will eventually match or `compare` with the value of V- and continue to increase to the larger supply voltage value. Prior to the input voltage comparison, the output of the comparator will be low since V+ will be at a lower voltage than V-. A low output comparator voltage resets all registers on the IC. At the point of comparison, when V+ equals V-, the comparator changes from a low to high output value, thus releasing register control of the IC back to the inputs of the registers. The dashed line in the timing diagrams displays the time where V+ and V- are compared, changing the state of the output.
A disadvantage of the comparator POR circuit shown in FIG. 1 occurs when the battery supply voltage ramps up slowly. As the battery supply voltage ramps up slowly, the capacitive delay is eliminated because the capacitor charges as fast as the voltage rises. Thus the capacitor voltage maintains the supply voltage while the completely resistive divider remains lower than the supply voltage. Therefore when a comparator has an input where V+ is always higher than V-, the output is always high, and no reset operation occurs, causing failure of the IC.
Another common POR circuit is the basic voltage referenced dualcomparator circuit shown in FIG. 2. This circuit consists of two comparators with a voltage reference applied at opposite polarity terminals of each comparator. The first comparator has a resistive divider at its negative input while the second has a current source, transistor switch and a capacitor at the positive input.
The timing diagrams in FIG. 2 shows the operation of the dualcomparator POR circuit. Upon power-up of the supply voltage, the first comparator output voltage will change from high to low when V-.sub.1 compares to V+.sub.1, the voltage reference. The behavior of the transistor switch is determined by the output of the first comparator. When the output of the first comparator is a high voltage upon power-up, the transistor switch is "on" and sinks all current from the current source. When the voltage of V-.sub.1 reaches and exceeds V+.sub.1, the output of the first comparator changes to low voltage, and the transistor switch is "off," preventing current flow through the transistor switch. The current then travels to the capacitor and begins raising the voltage of V+.sub.2.
The output of the second comparator is low initially since the reference voltage, V-.sub.2, is higher than V+.sub.2 because V+.sub.2 is shorted by the transistor switch to ground. When the transistor switch turns "off," the capacitor at V+.sub.2 charges up to a voltage that exceeds V-.sub.2, and the output of the second comparator changes from low to high voltage. When the output of the second comparator is low voltage, the circuit resets the IC register system as needed.
A disadvantage of the dual-comparator POR circuit is the use of a voltage reference which must be operational during the power-up of the IC, or turned on before power-up of the IC to provide a voltage reference to the POR circuit. The voltage reference must be either external to the chip or designed on-chip. Utilizing a voltage reference in a POR circuit in mobile electronic devices results in additional costs, power consumption and complexity.
Implementing an on-chip voltage reference requires providing for the circuit to turn the voltage reference on before or during power-up of the IC. Powering the voltage reference at all times results in increased power consumption. In the alternative, repeatedly powering-up voltage reference accurately, internal or external to the IC, is difficult, inconvenient, and adds complexity to IC design. Additionally, if implemented external to the IC, the voltage reference requires that a pin or pins be added to the IC, adding further complexity and size to the IC.
Another common method of resetting the registers in an IC is by utilizing the circuit shown in FIG. 3. The circuit shown in FIG. 3 uses a programmable unijunction transistor (PUJT) to simplify the design. In the past, POR circuits used a resistor/capacitor configuration (RC) shown to the right of the dashed line in FIG. 3. The RC provides a delay in the rise of the battery supply voltage as the capacitor charges up, resetting the registers in the IC system. The addition of a PUJT and the resistors on the left hand side of the dashed line in FIG. 3 to the RC POR circuit removes the need to detect a voltage drop. The PUJT is basically a p-n-p-n device with an anode gate. FIG. 4 shows the PUJT in greater detail.
With the addition of the PUJT and a resistor to the RC POR circuit, the capacitor supports the anode voltage as V.sub.cc. When the battery voltage drops, the PUJT triggers when its gate drops to about 0.7V below the anode. The capacitor discharges when the PUJT triggers, ensuring a reset by pulling the reset line low to implement a full register reset.
The first disadvantage of the RC POR circuit is that it requires a fast power-up and power down of the battery supply voltage. If the supply voltage powers up or down too slowly the RC time delay does not occur and reset does not generate a reset signal. Additionally, the RC POR circuit fails to provide accurate detection of a large supply voltage drop and does not provide the needed reset signal to prevent erratic operation of the IC.
The second disadvantage is that the RC components need to be so large that they may need to be implemented external to the IC. Furthermore, PUJTs are not available in IC fabrication technology so the PUJT must be implemented external to the IC. Also, if the voltage supply decreases slowly, capacitance slowly discharges, and the PUJT gate never becomes 0.7 volts below the anode of the PUJT, and no reset operation occurs.